Narasinga Rao joined ORNL as a software engineer in the Future Technology Group (FTG) in 2019. His current research is on RISC-V processor architecture exploration. Prior to this, he has worked in Samsung R&D Institute Bangalore (SRIB) for ~8 years on fixed point deep learning inference framework, Samsung Reconfigurable Processors development toolchain (compiler, cycle accurate simulators, etc.) and architecture exploration.
Narasinga received Ph.D. from K.U.Leuven and IMEC R&D (Belgium) in 2012 and M.Tech in Computer Science and Engineering from Indian Institute of Technology Delhi (IIT-D, India).
K.U.Leuven, IMEC R&D
Multiprocessor Embedded Systems (ESAT)
Indian Institute of Technology Delhi
Computer Science and Engineering
Last Updated: March 15, 2021 - 11:41 am